Making a Difference: CSR Initiatives by Signoff Semiconductors Introduction Creating a strong social impact has always been one of the major goals for Signoff Semiconductors. As a service-based organization founded on 10th December 2015, we have always believed in giving back to society as much as possible and are dedicated to making a meaningful impact since the initiation of our

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OCV, AOCV, and POCV Fig1: Derate Factor on Setup Analysis          Fig2: Derate Factor on Hold Analysis Issues in OCV:   Advance On-Chip Variation (AOCV):                  Fig3: Bounding box for cell and net distance Distance: If the distance increases, systematic variation will increase, and to mitigate the variation, we need to use a higher derate value. So along with the

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Introduction Optical Proximity Correction OPC is a resolution enhancement technique based on optical lithography. It is used in sub-wavelength lithography to deal with the severe image distortions. These image distortions typically include the: increased corner rounding, line-end shortening and changes in the width when located in isolated or dense environments. This technique helps in improving the imaging resolution. It is

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Layout Blog: Standard Cells Multiple Architectures Standard-cell library offers multiple architecture for best optimisation in performance, power, and area requirements of Digital designs. High Performance Architecture, a High-Density Architecture for varied customer application requirements. In each requirement (power/performance/area), layout approaches will be different to meet the design specifications. Here, we will covering in more common guidelines. Standard Cell Templates: Based

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Ways to fix setup violations: Setup violation occurs because of high delay in the data path or due to negative skew. Below are the ways to fix setup violation: Gate sizing Buffering

We hope you had a good understanding of Boolean Expressions which is available @ Boolean Expressions. In this blog, we will discuss on the simplification of boolean functions.

We hope you had a good understanding of Number Systems which is available @ Number Systems. For building hardware, we need logic gates, combinational circuits and sequential circuits which takes input in the form of binary numbers. The main building blocks to design combinational and sequential circuits are logic gates which is explained below.

We hope you had a good understanding of Logic Gates which is available @ Logic Gates. To reduce the logical complexities of any Boolean expression, a set of theorems have been developed which is explained below.

To start with VLSI skill development, we need to enhance our frontend skills. check the ASIC flow at ASICvsFPGA, which describes the frontend and backend flow for the full chip development. Frontend starts with specification gathering and architecture designing from the specifications gathered.