contribution - SignOff Semiconductors

Making a Difference: CSR Initiatives by Signoff Semiconductors

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Making a Difference: CSR Initiatives by Signoff Semiconductors Introduction Creating a strong social impact has always been one of the...

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OCV, AOCV, and POCV

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OCV, AOCV, and POCV In OCV, a fixed delay factor is applied to the delay of all the cells present...

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Optical Proximity Correction (OPC)

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Introduction Optical Proximity Correction OPC is a resolution enhancement technique based on optical lithography. It is used in sub-wavelength lithography...

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Layout Blog: Standard Cells

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Layout Blog: Standard Cells Multiple Architectures Standard-cell library offers multiple architecture for best optimisation in performance, power, and area requirements...

General

STA-2

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Ways to fix setup violations: Setup violation occurs because of high delay in the data path or due to negative...

Logic Design

Boolean Expressions-2

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We hope you had a good understanding of Boolean Expressions which is available @ Boolean Expressions. In this blog, we...

Logic Design

Logic Gates

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We hope you had a good understanding of Number Systems which is available @ Number Systems. For building hardware, we...

Logic Design

Boolean Expressions-1

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We hope you had a good understanding of Logic Gates which is available @ Logic Gates. To reduce the logical complexities...

Logic Design

Number Systems

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To start with VLSI skill development, we need to enhance our frontend skills. check the ASIC flow at ASICvsFPGA, which...

General

ASIC vs FPGA

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Before starting the discussion on what is ASIC and what is FPGA, we will first learn about the basics that...

File Formats

Introduction to SDC

Jedi

Before starting the discussion on what is ASIC and what is FPGA, we will first learn about the basics that...

Device Structure

Gate All Around FET

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GAA is somehow similar to FinFETs except the conducting channel is surrounded by gate all around. Thus we get better...

Logic Design

Communication Protocols

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UART stands for Universal Asynchronous Receiver-Transmitter. It is commonly used in the microcontroller to communicate with the peripheral. An 8-bit...

Device Structure

Bulk CMOS

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CMOS technology uses both NMOS and PMOS transistors, The transistors are arranged in a structure formed by two complementary networks....

Device Structure

FinFET-2 (Multi-Gate FinFET)

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In 1965, Gorden Moore in his paper predicted that how number of transistors in integrated circuit get double in every...

Device Structure

Silicon On Insulator ( SOI )

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Silicon on insulator (SOI) refers to the use of a three layered substrate in place of conventional bulk silicon substrates....

File Formats

UPF

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Power is one of the most concerned factor in the lower node technologies due to sophisticated operation of a system...

PD Flow

Post CTS Optimization

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During Clock tree synthesis, buffers or inverters are added in the clock nets to achieve minimum Insertion delay and Skew,...

SignOff Checks

STA-1

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What is STA ? Static timing analysis is one of the techniques used to verify the timing of a digital...

Physical Design

Client is a fortune 500 company and is leader in HPC and visual computing. Client had very ambitious goal on PPA (~15% higher utilization, ~30% increase in frequency), compared to their previous graphics core versions. To achieve these PPA goals, there was need of enhancing flow/methodology, tool, technology & design.

RISC V ASIC

Signoff Semi had a plan to work on the internal Research and Development for developing a proof of concept of a low power, low-cost computing platform. Signoff as a company did not had exposure to develop such products. This required expertise on Architecture, Front end Design, Firmware and toolkit development, FPGA prototyping/validation etc.

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Making a Difference: CSR Initiatives by Signoff Semiconductors

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Making a Difference: CSR Initiatives by Signoff Semiconductors

OCV, AOCV, and POCV

Optical Proximity Correction (OPC)

Layout Blog: Standard Cells

IC Design & Flow Overview

STA-2

Boolean Expressions-2

Logic Gates

Boolean Expressions-1

Number Systems

ASIC vs FPGA

Introduction to SDC

Gate All Around FET

Communication Protocols

Bulk CMOS

FinFET-2 (Multi-Gate FinFET)

Silicon On Insulator ( SOI )

UPF

Post CTS Optimization

STA-1

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