Job Code: PD-005

Location: Bangalore, Hyderabad

Job Description:

1. Job Description:
2. Good exposure in handling block/SOC level RTL-gds2.
3. Capable in handling block-level timing closure.
4. Excellent knowledge on all low power & signoff checks, like MVRC/CLP, LEC/Formality, DRC, LVS, IR, EM.
5. Good scripting skills (TCL/SHELL/PERL).
6. Experience on low power implementation techniques is preferred.
7. Prior experience in lower tech nodes like 10nm, 7nm, 5nm is preferred.
8. Synopsys/Cadence tool experience is preferred.
9. Should be comfortable with Signoff methodologies and guidelines.

Required Qualification:

1. Bachelor’s degree in Electronics & Communication/Electrical & Electronics. Master’s degree in VLSI is preferred.
2. Experience 5-8 years of relevant experience
3. Proven ability to identify, assess and solve problems
4. Analytical with good interpersonal skills
5. Good Communication
6. Excellent team player
7. High Integrity
8. Mentoring Team Members
9. Prior experience of leading a team of 2-4 Engineers.

Signoff Semiconductors is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard.

As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.