IR EM Design Engineer / Lead

Job Code : IR EM 11

Job Description

Areas of Focus and Key Responsibilities

  • Develop the flow, scripts & perform various electrical analyses at block and top levels, including static/dynamic IR, power/signal EM, in-rush-current/powerup analysis and ESD.
  • Drive block and top-level electrical verification closure
  • Develop static/dynamic IR, power/signal EM, ESD and power grid specs based on power/performance/area targets of different SOC blocks.
  • Implement power grids in industry standard PnR tool environments, preferably in ICC2 and/or Fusion Compiler.
  • Validating the PG Grid using Grid Resistance & Secondary PG Resistance Checks.
  • Work closely with the Package and/or Power Integrity teams to optimize the overall PDN performance.

Requirements

Minimum Requirements

  • BSEE or MSEE with at least 5+ years of experience on high complexity SoC designs preferably 7nm or lower technology nodes.
  • In-depth knowledge of EMIR tools such as Redhawk.
  • Experience in developing and implementing power grid
  • Good knowledge of system-level PDN and power integrity
  • Working knowledge of PnR implementation, verification, power analysis and STA
  • Proficient in scripting languages (TCL/Perl/Python)
  • Experience with industry standard EMIR tools such as Redhawk.
  • Must possess good communication skills, be a self-driven individual and a good team player.

Benefits

SignOff as an Organisation believes that all Signoffites should have a peaceful Professional Engagement and has the following benefits as below for the Role.

Half Yearly Performance Review and Annual Salary Hikes

Group Health Insurance (Self, Family, and Parents)

Group Personal Accident

Emergency Loan Facility

Salary Advance Facility

Rewards & Recognition

 

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